Implementation of Five Level H-Bridge Inverter with Less Number of Switches and Reduced Harmonics | |
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( Volume 3 Issue 1,January 2017 ) OPEN ACCESS | |
Author(s): | |
Pradeepa.K, Krishnan.S, Dhivyya Dharshinii.M, Akshaya.S.R | |
Abstract: | |
A multilevel inverter is a power electronic device that is used for high voltage and high power applications, with the added advantages of low switching stress and lower total harmonic distortion (THD), hence reducing the size and bulk of the passive filters. This paper proposes a new topology of a cascaded multilevel inverter that utilizes less number of switches than the conventional topology. Therefore with less number of switches in the circuit, there will be a reduction in the gate driver circuits and also in effect fewer switches will be conducting for specific intervals of time. The circuitry consists of smaller multilevel inverter blocks connected in series to achieve its characteristic output waveform. A five level inverter will be simulated and its effect on the harmonic spectrum will be analyzed. The system will be modelled with the help of MATLAB/SIMULINK. In this paper a new topology of the cascaded multilevel inverter has been shown to produce an increased stepped output with less number of semiconductor switches. With fewer switches, controlling the overall circuit becomes less complex, the size and installation area reduces. Based on the simulation results there is a decrease in the overall THD. |
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