High speed and low power Hybrid carry skip adder using DMFA | |
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( Volume 4 Issue 5,May 2018 ) OPEN ACCESS | |
Author(s): | |
Santhosh N.S, Shivarudraiah M.R, Amaresha S.K | |
Abstract: | |
The Adders are the integral part of the arithmetic and logic unit, hence increasing the performance of an adder is very important [1]. The Hybrid carry skip adder has better speed and less power utilization compare to conventional adders. In the modified carry skip adder, higher speed is achieved by concatenation and incrimination techniques. In addition, multiplexer in the skip logic of Conventional CSKA are replaced by use of AND-OR-Invert and OR-AND-Invert logic [3]. Then Hybrid CSKA using dual mode full adder (DMFA) is designed, which will replace the chain of ripple carry adders (RCA) present in the Hybrid carry skip adder with DMFA and Parallel prefix networks such as Brent-kung is used as a middle of the stage to achieve higher speed. The Proposed hybrid CSKA structure is analyzed by comparing the parameters of power, speed and area with a conventional carry skip adder and modified carry skip adder using 180 nm CMOS technology. Finally, ASIC implementation of Hybrid carry skip adder using DMFA is carried out by cadence Encounter tool and it start from pad creation, floor planning, power planning, placement and routing of designed Standard cell. |
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